Article-Journal

Daisy-chained Systolic Array and Reconfigurable Memory Space for Narrow Memory Bandwidth
A paradigm shift toward edge computing infrastructures that prioritize small footprint and scalable/easy-to-estimate performance is …
Jun Iwamoto, Renyuan Zhang, Yasuhiko Nakashima
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Evaluation of a Chained Systolic Array with High-Speed Links
Jun Iwamoto, Yuma Kikutani, Renyuan Zhang, Yasuhiko Nakashima
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