CGRA Cascading for Narrow Memory Bandwidth and Low Cost
Jun Iwamoto,
Yuma Kikutani,
Renyuan Zhang,
Yasuhiko Nakashima
December, 2019
Abstract
Outstanding Originality Award
CGRA is a two-dimensional array of processing units, like an adders and multipliers connection by a mesh-like interconnect. The computation has to be laid out in space and time, and the data explicitly routed through the interconnection in the application code.
Publication
xSIG 2019: The 3rd. cross-disciplinary Workshop on Computing Systems, Infrastructures, and Programming
Software Developer
My research interests include distributed robotics, mobile computing and programmable matter.